Happy New Year!
I think we missed the cutoff for Ada 2022, so I guess the next standard version will be Ada 2023?
5 posts - 5 participants
I think we missed the cutoff for Ada 2022, so I guess the next standard version will be Ada 2023?
5 posts - 5 participants
Iβm having fun building a visualization, so Iβve only finished part 1. Itβs not about the leaderboard, right?
6 posts - 6 participants
Iβve been playing with optimizations for an instance of Ada.Containers.Hashed_Sets
for the Advent of Code Day 9 puzzle.
RM A.18.1 The Package Containers says:
type Hash_Type is mod implementation-defined;
With the Implementation advice:
Hash_Type'Modulus
should be at least2**32
.
The annotated RM expands upon this:
This is not a requirement so that these types can be declared properly on machines with native sizes that are not 32 bits. For instance, a 24-bit target could use
2**24
forHash_Type'Modulus
.
In GNATβs a-contai.ads, the definition is simply:
type Hash_Type is mod 2**32;
Would it make sense to use System.Max_Binary_Modulus
instead, so that 64-bit systems can benefit from a larger hash space?
type Hash_Type is mod System.Max_Binary_Modulus;
If we want to retain the minimum 32-bit size, a conditional could be added:
type Hash_Type is mod (if System.Max_Binary_Modulus >= 32 then System.Max_Binary_Modulus else 32);
1 post - 1 participant
I think the problem statement was intentionally difficult to parse this time. Those conditionals are a lot simpler than it makes them sound.
I kept the visited positions in a Hashed_Set
and coming up with a good Hash
function for a pair of Integers was new for me. I ended up making a lot of assumptions (Integer'Size = 32 and Hash_Type'Size = 64
) and just shifted one of the integers left 32 bits. A cursory Google search turned up the Cantor Pairing function, but I wasnβt able to make this work with negative integers in a short amount of time. Clearly I need to do more reading.
Part 2 caught me off guard, I hadnβt anticipated Iβd need to deal with more elements.
Note: Iβm going to stop using the spoiler blur on the daily posts. If youβve gotten this far, I assume you know that these posts contain spoilers.
13 posts - 8 participants
Doesnβt look like Iβll get this one finished tonight, but Iβll create a topic here anyway. Looking forward to seeing everyoneβs solutions.
13 posts - 10 participants
[JeremyGrosser][1][Ada]advent/day1_2.adb at 176068a2109faca088baa96b7cb77a078264693c Β· JeremyGrosser/advent Β· GitHub
Kind of a rough start for me this year, I pulled in my Stream I/O library and test framework from last year, but I think that just made things more complicated than they need to be.
23 posts - 11 participants
https://lists.debian.org/debian-ada/2022/11/msg00000.html
AdaControl, GNAT Studio, GtkAda, and many other Ada packages are slated for removal from Debian with the transition to GCC 12.
If you feel strongly about keeping these things available in an OS package manager rather than Alire, nowβs the time to speak up.
3 posts - 3 participants
Advent of Code is a series of daily programming puzzles from December 1st to 25th, becoming progressively more difficult each day.
Iβd like to encourage conversation about the problems and solutions in Ada and SPARK on this forum.
Iβve created a new Advent of Code category. If you donβt see a topic for todayβs puzzle, feel free to create one. Discussion of general techniques and tools not tied to a specific puzzle is also welcome.
Iβve installed the βSpoiler Alertβ plugin, you should use this when posting completed solutions. See below for an example of how to use this feature, along with syntax highlighting.
1 post - 1 participant
On the RP2040, each GPIO pin can trigger four different interrupts: high level, low level, rising edge, and falling edge. Each pin has a 4-bit field for selecting which of these interrupts is enabled. I modeled it as an array of records.
with System;
procedure Main is
type INT_Field is record
Low_Level, High_Level, Falling_Edge, Rising_Edge : Boolean := False;
end record
with Size => 4;
for INT_Field use record
Low_Level at 0 range 0 .. 0;
High_Level at 0 range 1 .. 1;
Falling_Edge at 0 range 2 .. 2;
Rising_Edge at 0 range 3 .. 3;
end record;
type GPIO_Pin is range 0 .. 30;
type INT_Register is array (GPIO_Pin) of INT_Field
with Component_Size => 4;
type GPIO_Peripheral is record
INTE : INT_Register; -- Write to enable interrupts
INTS : INT_Register; -- Masked status of enabled interrupts
INTR : INT_Register; -- Unmasked interrupt status, write to clear
end record;
GPIO : GPIO_Peripheral
with Import, Address => System'To_Address (16#4001_40F0#);
begin
GPIO.INTE (7).Rising_Edge := True;
end Main;
Iβm simplifying things a bit here for clarity. You can find the actual implementation on GitHub
On the surface, this looks like it should work. Compiling with GNAT, this results in a strb
(Store Byte) instruction after shifting some bits around.
Now this is where the bug comes in⦠The RP2040 datasheet explains:
2.1.4. Narrow IO Register Writes
Memory-mapped IO registers on RP2040 ignore the width of bus read/write accesses. They treat all writes as though they were 32 bits in size. This means software can not use byte or halfword writes to modify part of an IO register: any write to an address where the 30 address MSBs match the register address will affect the contents of the entire register.
By βaffect the contents of the entire register,β it means that an 8-bit write to a 32-bit register will change all of the bytes of the register to the same value.
If our register value is 16#0000_0000#
and the strb
instruction is setting bit 8 so that we have 16#0000_0100#
, the resulting value is 16#0101_0101#
instead.
My solution is to add another array to group fields into 32-bit array elements, so that we can use the Volatile_Full_Access
aspect to guarantee that the whole word is written using the str
instruction.
type INT_Register is array (0 .. 7) of INT_Field
with Volatile_Full_Access, Component_Size => 4, Size => 32;
type INT_Group is array (0 .. 3) of INT_Register
with Component_Size => 32;
This solution works, but has left me wondering how we can prevent this from happening again in the future. This is not the first bug Iβve encountered caused by the narrow write behavior of the I/O memory.
I have a few questions for discussion:
Async_Writers
aspect, which indicates that some external process can modify the register value. If we were to verify this code, it seems like every register would need this aspect due to this narrow write behavior.6 posts - 5 participants
With Ada 2022βs support for user defined type literals, Unicode strings should be easier to work with. I worry that everyone is going to implement their own slightly different string type and weβll end up with a bunch of incompatible libraries in Alire.
It looks like AdaCore is building VSS (derived from Matreshka) while also maintaining XML/Ada, which has itβs own Unicode
package and types.
As a community I think we should define a common interface, or risk spending the rest of our lives converting string representations.
14 posts - 9 participants
It would be nice to test some of my code on another compiler, just to make sure I havenβt gotten too attached to implementation quirks.
What other Ada compilers are available? How much do they cost? Am I gonna have to talk to a human to get it?
30 posts - 13 participants
Iβd like to write more applications in Ada, but I often find that I need a library that doesnβt exist or isnβt well maintained. I thought it might be a good idea to share my wishlist in case anyone is looking for a project or wants to collaborate. I may have already started prototyping some of these.
Ada.Numerics
usage would be helpful.Whatβs on your wishlist?
10 posts - 7 participants